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I am currently the Web Review Chair for IEEE Micro Top Picks 2008. Please provide quality submissions.
I work in the UCSD High Performance Processor Architecture and Compilation lab for Professor Dean Tullsen.
My research interests include speculative multithreading, transactional memory, thread-level parallelism, branch-prediction, cache-design, chip-multiprocessors, simultaneous multithreading, and cache coherence.
I began my studies at the University of California, San Diego in Fall 2004 and completed my MS in Computer Science in March 2007. I interned at Microsoft Research in the Hardware Research lab in 2006 where I worked on the Greedy CAM Architecture with Ray Bittner.