· Instructor: Beth Simon
Office: EBU3b 4104
bsimon at cs dot ucsd dot edu
Office Hours:
► Place: EBU3b 4104
► Times: TBA
· Class Meetings:
► Place: WLH 2005
► Time: F 13:00-13:50
· TA: Raid Ayoub
rayoub at cs dot ucsd dot edu
Office Hours:
► Place: EBU3B B260
► Times: Monday 10:00-12:00 + Tuesday 11:15-12:15
· TA: Kwangyoon Lee
kwl002 at cs dot ucsd dot edu
Office Hours:
► Place: EBU3B B240A
► Times: Tuesday 15:00-17:00 + Thursday 15:30-16:30
· Webboard
► A class webboard is available: CSE141L Webboard
► Please use the webboard for all questions you have about Lab material. Personal questions may be directed to TAs or Beth
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3/04: TA Raid office hours for Monday 3/5 and Tuesday 3/6 will be
moved to Wednesday 3/7 4:00-7:00 pm
3/02: Lab3 interview extention information:
Teams who do not finish your design can have an extention with 10% penalty (3 points).
You are required to submit your final output by email to both the TAs (vhdl files, docs and so on) by Monday (03/05) midnight.
You should finish your interview by visiting any TA office hours opened next week (Check this site !).
3/02: Lab4 information has been posted in the Lab Assignments link.
2/28: Lab3 Interview information has been posted in the Lab Assignments link.
2/6: Lab2 Interview information has been posted in the Lab Assignments link.
1/25 Tutorials for Xilinx and Logicworks have been posted in the Tutorials link.
1/25: Lab1 Interview information has been posted in the Lab Assignments link and on webboard annoucement.
1/12: The first Lab assignment has been posted in the Lab assignments link
1/9: Welcome to CSE 141L
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