CSE 141 Vocabulary for Computer Architecture

This is a growing list of terms that students in CS&E 141 should be familiar with and know something about (for example, what are the advantages and drawbacks of such-and-such). Many of the terms have only been introduced briefly so far, but we'll be learning more about as the course goes on. It might be useful to review these terms occasionally, and ask about any if you aren't sure about their meaning or significance.

Architecture, Instruction Set Architecture.
Hardware, system software (compiler, assembler, Operating System), application software.
Vacuum Tube, transistor, Integrated Circuit, LSI, VLSI (VLSI starts at about 10,000 transistors/chip).
A little history ...
- Earliest computers: People, Babbage's Analytical Engine (mid 1800's -- mechanical), Turing Machine (theoretical model), ENIAC & EDSAC (1940's -- among the first electronic computers.)
- Generation 1: Vacuum tubes and volatile memory (till late 50's).
- Generation 2: Transistor logic and magnetic storage (till mid 60's).
- Generation 3: Integrated circuits, complex instructions via microcode (till mid 70's).
- Generation 4 and beyond: VLSI, semiconductor main memory, single-chip processors.
CRT (Cathode Ray Tube), monitor, keyboard, mouse, CD ROM.
Magnetic storage, core memory, hard disk, floppy, tape.
Semiconductor memory, DRAM, SRAM, VRAM, cache, DRAM growth rule.
CISC, RISC.
Computer classification and important architectures:
- Supercomputers: Traditional CRAY vector machines
- Mainframes or servers: IBM 370, DEC VAX 11
- Workstations: IBM RS6000, SGI MIPS, ...
- PC's: Intel x86 (286, 386, 486, Pentium, PentiumPro), Motorola/IBM PowerPC
- Embedded controllers (e.g. disk controller)
Datapath, Control, Processor or CPU, Memory, Input, Output.
K = Kilo = 1000, M = Mega = 1,000,000, G = Giga = billion, T = Tera = trillion.
2^10 is about 1000, 2^20 is about 1,000,000 (and for DRAM capacity, K means 1024 and M means 1,048,576).
Millisecond = ms = .001 second. Microsecond = us = 10^-6 second. Nanosecond = ns = 10^-9 sec.
Throughput (jobs per unit time) vs execution time.
For data movement, Latency measures response time, Bandwidth measures throughput.
Throughput can be improved by Parallelization and Pipelining.
Execution time can be measured by:
- Wallclock or elapsed time, or
- CPU time (Unix has user CPU time and system CPU time)
Performance
- system performance = 1/elapsed time on unloaded system
- CPU performance = 1/user CPU time
A is p% faster than B; A is p% slower that B; A is r times faster than B.
Clock speed (MHz, Hertz, cycles/sec), cycle time (ns/cycle).
Peak MIPS rate, average MIPS, CPI, dynamic vs. static instruction count
Weighted average
Execution time = Instruction count x CPI x Cycle time
Nominal MIPS, MFLOPS (FLOPS = floating point operation/second)
Benchmarks, Linpack, SPEC ('89, '92, '95), SPECint and SPECfp.
Amdahl's Law
Operating system (OS).
User mode, supervisor mode, privileged instructions for kernel or supervisor processes.
Exceptions: internal exceptions, interrupts (external exceptions).
Vectored interrupts vs cause register. Running with interrupts disabled.
Memory mapped I/O versus dedicated I/O instructions.
Polling vs interrupt-driven I/O. DMA.
Principle of locality: spatial locality, temporal locality.
Cache, block or cacheline, hit, miss, hit (or miss) rate, hit time, miss penalty.
Cache designs: direct mapped, k-way set associative, fully associative, LRU replacement, write-through, write-back.
How to find data in a cache: tag, index (or set), and offset fields.
Valid and dirty bits. Inconsistent memory and cache.
Typical memory hierarchy: tape, disk, main memory, L2 cache, L1 cache, registers.
Virtual memory, virtual and physical addresses, page, page fault.
Virtual memory provides protection, and solves problems of limited physical memory.
Memory mapping or address translation, (virtual page number,offset)-> (physical page number,offset).
Page table, page table register, translation lookaside buffer (TLB).
Virtually addressed cache, physically addressed cache
Endian (see page A-45 of text)
Layers of abstraction: API (application user interface), programming language, ISA, microcode.
IBM 360/370 family (first instruction set architecture; introduced mid 60's, upgraded architecture still being sold).
VAX (typical CISC computer; introduced mid 70's)
Arithmetic instruction types: mem-mem, reg-mem, reg-reg, 2- or 3-address.
Architecture types: register-memory, load-store (also called reg-reg), accumulator.
J-format, I-format, and R-format MIPS instructions
MIPS instructions: Branch, Jump, Jump register, Jump-and-link, Load, Store, Add, Add Immediate.
MIPS addressing modes: Register, base-displacement, immediate, PC-relative.
Other addressing modes: indirect ("deferred" in VAX-speak), indexed (scaled), autoincrement.
Combinational logic, sequential logic.
Register file, memory, multiplexor, decoder, adder.
Random logic, PLA, ROM.
Details of MIPS lw, sw, beq, jump, jump register, and R-type instructions.
How above instructions are implemented in one-cycle and multi-cycle designs.
Microcode-based control unit, dispatch ROM's.
Typical pipeline stages: instruction fetch, instruction decode, execute, memory, writeback.
Data and control hazzards, stalling, forwarding (or bypassing), delayed load and delayed branch.
Buses: backplane, I/O (e.g. SCSI bus), networks (e.g. Ethernet).